The present invention relates generally to integrated circuits and, more particularly to electromechanical memory devices and method for manufacturing such memory devices.
As mobile electronic products continue to include more memory devices, flash memory has become increasingly important in storing and retrieving data in the electronic products. With the continuous decrease in semiconductor technology process nodes, in particular for process nodes at 20 nm and below, there is a physical limit to the thickness of the tunnel dielectric layer.
3D integration technology can advantageously be employed in memory designs to increase storage capacity, a variety of cross-point memory arrays may be considered as a successor to flash memory.
FIGS. 1A through 1C illustrate cross-sectional views of a non-volatile electromechanical diode memory cell of the related art. FIG. 1A is a cross-sectional view illustrating an initial state of a conventional electromechanical diode memory cell. FIG. 1B is a cross-sectional view illustrating the programming principle of the conventional electromechanical diode memory cell. FIG. 1C is a cross-sectional view illustrating the reset principle of the conventional electromechanical diode memory cell.
As shown in FIG. 1A, the non-volatile electromechanical diode memory cell includes a bit line (BL) 101 intersecting a word line (WL) 102, and an air gap 103 separating the bit line from the word line. Bit line 101 is made of a low work function material including phosphorous-doped polycrystalline silicon (N-type), word line 102 is made of a high work function material including a boron-doped polycrystalline silicon (P-type). When the non-volatile electromechanical diode memory cell is not programmed, bit line 101 and word line 102 are separated by air gap 103 so that no current flows through the memory cell. In FIG. 1A, bit line 101 extends in a direction perpendicular to the surface of the paper, and word line 102 extends in a direction parallel to the surface of the paper.
During programming, a reverse-bias voltage pulse greater than the beam pull-in voltage is applied between word line 102 and bit line 101 to induce a pulling electrostatic force (indicated by arrow 110) so that word line 102 makes contact with bit line 101 at the intersection region and form a diode structure, as shown in FIG. 1B.
To reset the memory cell to the initial open-circuit state, a forward-bias voltage pulse is applied between word line 102 and bit line 101 to generate another (pushing) electrostatic force (indicated by arrow 112) to counteract the inherent electrostatic force of the diode structure, as shown in FIG. 1C. After applying the forward bias voltage pulse, the memory cell will return to the open-circuit state shown in FIG. 1A.
FIG. 2 is a configuration of a cross-point array of non-volatile electromechanical diode memory cells (also called a memory array or memory circuit). In the memory array shown in FIG. 2, the cross point of the WL′ line and BL′ line is selected, i.e., the memory cell in the dashed circle is selected. Therefore, the selected memory cell forms a diode, the remaining non-selected memory cells are in the open-circuit reset state. When the memory array is manufactured without any settings, the default state of all memory cells is the open-circuit reset state.
Conventional non-volatile electromechanical diode memory arrays are suitable for compact storage applications, and the relatively simple 3D integration process enables a wide range of applications. However, since bit line 101 includes a low work function material of phosphorous doped polycrystalline silicon (N-type), and the word line 102 is made of a high work function material of boron-doped polycrystalline silicon (P-type), the different work function materials make it difficult to control the uniformity of bit line 101 and word line 102, thereby affecting the device performance. Furthermore, the fabrication of bit line 101 and word line 102 require additional ion implantation processes, which may lower the production efficiency.
Thus, an improved electromechanical diode memory cell and a method of fabricating the same are desired.